AUSTIN, Texas--(BUSINESS WIRE)--The Silicon Integration Initiative Compact Model Coalition is proud to announce the release of the ASM-ESD diode model, a new electrostatic discharge compact modeling standard that aims to improve the reliability of integrated circuits.
The wide range of ESD features required by different members of the coalition, combined with the difficulty of model parameter extraction or model fitting, made the development of this model particularly challenging. However, with the contributions of Dr. Sourabh Khandelwal of Macquarie University in Sydney, Australia, and the involvement of Geoffrey Coram and Paul Zhou from ADI and Michi Stockinger from NXP, the ASM-ESD diode model has been successfully developed and is ready for use in generic ESD simulation.
"Electrostatic discharge is a major reliability issue for ICs, as it can cause irreversible damage and total failure of a circuit," said Meng Miao, principal engineer at GlobalFoundries and chair of the Advanced SPICE Model for ESD Diodes Working Group. "With the advancement of CMOS technology and the increasing transmission rate of I/O interfaces, the design margin for ESD is shrinking, making it more difficult to design ICs that can withstand ESD stress."
While ESD is an important industry problem, the new ASM-ESD diode model is a powerful tool enabling IC manufacturers to create more reliable and robust products.
"Accurate SPICE simulation of electrostatic discharge scenarios and circuit protection is crucial to avoid ESD failures in integrated circuits and products," said Khandelwal. "ESD protection and core circuit co-design are increasingly important in advanced ICs, but conventional diode models do not account for ESD event regimes, during which the device operates under significantly different voltage, current, and thermal conditions. The Advanced SPICE Model for ESD Diodes captures diode behavior under ESD event conditions."
This new standard will help IC manufacturers ensure their products meet industry standards for ESD and provide a more robust solution for ESD design. The model is expected to be widely adopted in the industry as a means to improve the reliability of ICs.
About the CMC
Compact Model Coalition SPICE models are used to design and simulate the world’s most advanced semiconductors. Partnering with universities and national laboratories, the CMC pools industry resources to fund and develop compact SPICE models and interfaces that promote simulation tool interoperability. The CMC quality assurance program ensures that simulations are uniformly accurate and reliable across different vendor tools. CMC membership is open to semiconductor manufacturers, designers, and simulation tool providers.
About Si2
Silicon Integration Initiative is a leading research and development joint venture providing standard interoperability solutions for silicon-to-system implementation. Si2 activities are conducted under the auspices of The National Cooperative Research and Production Act of 1993. This fundamental law defines R&D joint ventures and offers them significant protection against federal antitrust laws. Si2 has 65 members, including semiconductor and fabless manufacturers, foundries, and EDA companies.
To learn more about Si2 and its mission, please visit www.si2.org.
