Research and Markets: New Book 'High-k Gate Dielectrics for CMOS Technology' Is Aimed at Academia and Industry Alike

DUBLIN--()--Research and Markets (http://www.researchandmarkets.com/research/t97j5l/highk_gate_dielec) has announced the addition of John Wiley and Sons Ltd's new book "High-k Gate Dielectrics for CMOS Technology" to their offering.

A state-of-the-art overview of high-k dielectric materials for advanced field-effect transistors, from both a fundamental and a technological viewpoint, summarizing the latest research results and development solutions.

The book clearly discusses the advantages of these materials over conventional materials and also addresses the issues that accompany their integration into existing production technologies. Topics covered include downscaling limits of current transistor designs, deposition techniques for high-k dielectric materials, electrical characterization of the resulting devices, and an outlook towards future transistor stacking technology.

Aimed at academia and industry alike, this monograph combines introductory parts for newcomers to the field as well as advanced sections with directly applicable solutions for experienced researchers and developers in materials science, physics and electrical engineering.

Key Topics Covered:

Scaling and Limitations of Si-based CMOS

Oxide Reliability Issues

Development and Limitations of Silicon Oxynitride Gate Dielectrics

High-k Gate Dielectrics: Why Do We Need Them?

Materials Issues for High-k Gate Dielectrics Selection and Integration

High-k Gate Dielectrics Deposition Technology

Atomic-scale Characterization Methods in High-k/Si Gate Stacks

Electronic Structure and Band Offsets of Alternative High-k Gate Dielectrics

Issues of Dipole Layers Formed in High-k/Si Interfaces

Physicochemical Properties of Selected 4d, 5d and Rare Earth Metals in Silicon

Integration and Challenges of Hf-based High-k Gate Dielectrics

Integration and Challenges of La-based High-k Gate Dielectrics

Integration and Challenges of Perovskite-structured Oxide Gate Dielectrics

Issues in Metal Gate Electrode Selection for Bulk CMOS Devices

Advances and Challenges in Gate Electrodes

High-k Gate Dielectric Materials Integrated Circuit Device Design Issues

Future Gate stack Technology for the 22nm Node and Beyond

For more information visit http://www.researchandmarkets.com/research/t97j5l/highk_gate_dielec

Source: John Wiley and Sons Ltd

Contacts

Research and Markets
Laura Wood, Senior Manager
press@researchandmarkets.com
U.S. Fax: 646-607-1907
Fax (outside U.S.): +353-1-481-1716
Sector: Physics

Contacts

Research and Markets
Laura Wood, Senior Manager
press@researchandmarkets.com
U.S. Fax: 646-607-1907
Fax (outside U.S.): +353-1-481-1716
Sector: Physics