SAN JOSE, Calif.--(BUSINESS WIRE)--ATopTech, the leader in next generation physical design solutions, closed 2010 with over 70% growth in revenue over 2009. 2010 also marked the first year that the company, which has been operating on self-generated revenue since 2005, realized its first full year of profitability. Expansion of existing multi-million, multi-year contracts with companies such as PMC-Sierra (which increased the value of its multi-year contract) contributed to growth, as did several new customers, such as PLX Technology, ClariPhy Communications, and others.
ATopTech's physical design tools, Aprisa™ and Apogee™, are architected specifically to meet the challenges of designing integrated circuits (ICs) at the most advanced technology nodes. Aprisa is the company’s complete place and route (P&R) engine, including placement, clock tree synthesis, optimization, global routing, and detailed routing. Apogee is a complete top down floorplanning and chip assembly tool that complements Aprisa. In 2010, ATopTech collaborated with TSMC to enhance Aprisa for routing rule support to ensure TSMC 28nm compliance. In December 2010, Aprisa was certified for 28nm routing by TSMC.
“We chose ATopTech to be the standard for our 40nm programs due to ATopTech’s strong application support and quality of results. Aprisa’s ease of use enabled us to quickly transition our engineers to our 40nm products,” said Alan Nakamoto, vice president, design services at PMC-Sierra, the premier Internet infrastructure semiconductor solution provider.
“ATopTech’s out-of-the-box QoR was very impressive. We were able to ramp our team quickly, while transitioning to 40nm,” said Larry Chisvin, chief operating officer of PLX Technology, which is the technology and market share leader in PCI Express switches, bridges and 10GBase-T PHY solutions, with additional leadership in consumer storage controllers and general-purpose USB controllers.
“Aprisa’s correlation with sign off tools is extremely good. It virtually eliminated the many iterations usually required by other tools. Designs came out DRC and timing clean in the first iteration. We don’t believe we could have gotten our chips out the door faster with any other tool,” said Andre Chartrand, vice president of engineering at ClariPhy Communications, a leader in ultra high speed mixed signal, digital signal processing (MXSP) integrated circuits for optical networks.
“2010 results reflect the strength of our solutions at the most advanced technology nodes,” said Jue-Hsien Chern, CEO of ATopTech. “Our continued growth reflects both customer satisfaction and increased recognition among new customers of the value that ATopTech can bring to IC physical design closure.”
About ATopTech
ATopTech, Inc., is the technology leader in IC physical design. ATopTech’s technology offers the fastest time to design closure focused on advanced technology nodes. The use of state-of-the-art multi-threading and distributed processing technologies speeds up the design process, resulting in unsurpassed project completion times. For more information, see www.atoptech.com
Aprisa and Apogee are trademarks and ATopTech is a registered trademark of ATopTech, Inc. Any other trademarks or trade names mentioned are the property of their respective owners.